STMicroelectronics and NUS open HELIX lab to push edge AI from devices to silicon

STMicroelectronics and the National University of Singapore have opened the ST–NUS HELIX Corporate Lab, a four-year research program aimed at building the hardware foundation for the next generation of edge AI. NUS’ College of Design and Engineering published details of the initiative on August 25 after the official launch ceremony on August 24. HELIX stands for Hardware for Embodied Low-power Intelligent Xcceleration, and its focus is clear: make AI systems that can perceive, reason and act directly on physical devices without relying entirely on cloud data centers.

The partnership brings together ST’s semiconductor engineering and NUS research in integrated circuits, computer architecture, AI models and system design. The lab is hosted at NUS’ College of Design and Engineering with participation from the School of Computing, and it is supported under Singapore’s Research, Innovation and Enterprise 2025 plan. Senior Minister of State Low Yen Ling attended the launch as guest of honor, underscoring that the project is not only an academic collaboration but also part of Singapore’s strategy to strengthen its semiconductor and AI base.

Edge AI is becoming more important as models move into robots, drones, industrial sensors, vehicles and other devices that must make decisions close to where data is generated. Cloud AI can be powerful, but it can also introduce latency, bandwidth demands, privacy exposure and connectivity dependence. For embodied AI, those trade-offs can be unacceptable. A drone cannot always wait for a remote server to interpret sensor data, and a robot operating near people needs fast, reliable local perception and control.

HELIX is designed to address that challenge across the full technology stack. According to ST and NUS, the research will cover AI algorithms, accelerator architectures, memory systems, circuit design, chip integration and silicon implementation. A major emphasis will be memory-centric architecture, in-memory computing and scalable compute-and-memory systems. That focus reflects a central problem in AI hardware: moving data between memory and processors often consumes more energy than computation itself, especially for workloads that repeatedly read model weights or sensor streams.

ST will provide NUS with a dedicated design chassis using its proprietary P18 18nm fully depleted silicon-on-insulator technology and embedded phase-change memory. FD-SOI can support low-power operation and adaptive body-biasing, while embedded non-volatile memory can reduce dependence on off-chip data movement. For researchers, the design platform offers an industrial-grade starting point for testing AI accelerator ideas without building every underlying component from scratch. For ST, it creates a closer path between academic exploration and semiconductor products that may eventually serve real device markets.

The lab will also train students, researchers and engineers in a field where talent is becoming as strategic as chips themselves. Singapore already plays an important role in the global semiconductor supply chain, but it cannot compete only on manufacturing scale. Projects like HELIX are meant to deepen local capability in design, low-power systems and AI-specific hardware. That matters as governments and companies seek more resilient supply chains and more efficient ways to run AI outside centralized cloud clusters.

The immediate output of HELIX will be research packages, prototypes, intellectual property and demonstrations rather than a single consumer product. Its long-term importance depends on whether it can turn lab work into scalable edge AI platforms for robots, drones and intelligent devices. If it succeeds, the project could help shift part of the AI race away from giant data centers and toward compact systems that carry intelligence into the physical world.